Density is the ratio of traces, holes, pads by area unit (mm², inch², etc…) When there are only a few traces, density is not an issue. But modern density requires modern solutions and every day, the customers and the factories are asking for more compact and more complex design mainly due to the component technologies. This is the challenge !

Obviously, if you need more density on a PCB, you need to reduce the size of the lines, the size of the spaces, holes, vias, and increase the number of layers, the number of connections, and improve the routing on layers. It’s easy to understand, but it’s pure science and technology to make it happen. The more density is high, the more PCB is complex. The trend of the market since many years is to increase the density.

If you push the concept to its limits, then you will have a High-Density Interconnect PCB if you reach an average amount of 160 pins per square inch. High technology and complex processes do not necessarily mean a rise of costs!

For HDI, it is exactly the opposite as the cost of the material is more important than the cost of the density. More traces, more connections, less expensive ! In fact you pay more because material is more expensive and because the process is more complex, But the cost of electronic function is cheaper because more efficient and more concentrate.

With the advancement and the miniaturization of electronics, the demand for HDI PCBs has increased drastically but increase density on a printed circuit board is a challenge, from design to production. The spaces between the traces are up to 65µm. It’s always hard to imagine such small units. 1µm is 0,001mm, and just to compare, a human hair measures 50 to 100µm in diameter! As this very small size is not challenging enough, HDI PCB’s are made with at least 4 layers and can be up to 24 layers, connected to each other by holes and vias to make an ultra-complex design rules and production processes, furthermore we aren’t speaking here about mechanics using steel or aluminum but plastic material like FR4 which is much more difficult to machine.

If the design is challenging for the engineers with their software, one of the main problems in production is to ensure the reliability of the plated holes. The main problem comes from the vias and holes and the plating process. To assume a good hole plating integrity, the aspect ratio is limited to 1: 0.8 for blind vias, advanced value is 1:1. Standard pre-pregs also contain fiberglass which is too thick for laser drilling but also The glass contained in the pre-preg changes the laser direction and creates a mediocre or wrong shape quality of laser via holes.

The build-up must use thinner base copper to have a good tracks definition. (many plating processes increase the total copper thickness). The base copper choice may influence the signal propagation for high-frequency applications as well. Thinner prepreg, thinner base copper, thinner PCB is the trend for HDI PCBs.

Via holes are sensitives. The vias are like rivets during the assembly process. RoHS processes apply a high thermal stress on the material and furthermore on the vias. The expansion of the material in the Z axis stress the vias. The trend is to continuously reduce the via diameter as well as to increase reliability. Furthermore, the assembly process multiplies the number of thermal chocks. Due to this new situation, the only way to reduce the force applied during assembly is to use more stable FR4. Low CTE (coefficient of thermal expansion) materials are mandatory if we want to limit the breaking holes phenomena during the assembly process and in harsh environments.